Flow-control structures: Difference between revisions
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=={{header|68000 Assembly}}==
<code>JMP</code>,<code>JSR</code>,<code>RTS</code>, and branching work almost identical to [[6502 Assembly]]. There are a few exceptions:
* Compared to the 6502, <code>BCS</code> and <code>BCC</code> are the opposite for the purposes of unsigned comparisons. (The 6502 is actually the odd one out here - on most architectures "carry clear" represents greater than or equal, but 6502 is the opposite!)
* An additional <code>BSR</code> can be used for nearby subroutines. This
* <code>DBRA</code> is used for looping. A register operand is decremented with each loop. The loop terminates when the value in the register underflows from 0 to FFFF.
* <code>TRAP #</code> is often used for error handling. These can occur automatically (such as if a nonexistent machine instruction is executed or the CPU attempts to divide by zero), or at the programmer's request (such as <code>TRAPV</code> to detect signed overflow or just TRAP # to execute a specific trap.) Traps can also be used by the firmware to perform built-in tasks such as reading a keyboard or mouse input. Some systems (such as the Sega Genesis and NEO GEO) allow the programmer to alter the destination of the traps, allowing for custom error handlers. (However, these locations are usually in ROM and thus cannot be changed at runtime.)
=={{header|Ada}}==
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