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Memory layout of a data structure: Difference between revisions
Memory layout of a data structure (view source)
Revision as of 12:30, 21 November 2011
, 12 years ago→{{header|PicoLisp}}
m ({{omit from|GUISS}}) |
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Line 384:
(when (bit? CTS Data)
... )</lang>
=={{header|PL/I}}==
<lang PL/I>
declare 1 RS232_layout,
2 Carrier_Detect Bit(1),
2 Received_Data Bit(1),
2 Transmitted_Data Bit(1),
2 Data_Terminal_ready Bit(1),
2 Signal_Ground Bit(1),
2 Data_Set_Ready Bit(1),
2 Request_To_Send Bit(1),
2 Clear_To_Send Bit(1),
2 Ring_Indicator Bit(1);
</lang>
=={{header|Python}}==
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