Two's complement: Difference between revisions

Content added Content deleted
Line 17: Line 17:
CLC
CLC
ADC #1 ;result: #%10101011</lang>
ADC #1 ;result: #%10101011</lang>
===16-bit===
<lang 6502asm>myVar equ $20

LDA #3
STA myVar
LDA #0
STA myVar+1 ;equivalent C: uint16_t myVar = 3;

negate:
LDA myVar+1
EOR #255
STA myVar+1

LDA myVar
EOR #255
STA myVar
CLC
ADC #1
STA myVar
;this handles the case if we started with something where the low byte was zero.
LDA myVar+1
ADC #0
STA myVar+1</lang>


=={{header|Z80 Assembly}}==
=={{header|Z80 Assembly}}==