Memory layout of a data structure: Difference between revisions

Ring_Indicator at 0 range 8..8;

end record;</lang>

=={{header|ALGOL 68}}==

{{works with|ALGOL 68|Revision 1 - no extensions to language used}}

{{wont work with|ALGOL 68G|Any - tested with release [https://sourceforge.net/projects/algol68/files/algol68g/algol68g-1.15-0.8b/algol68g-mk15-0.8b.fc9.i386.rpm/download algol68g-1.15-0.8b] - bug is order of BITS}}

{{works with|ALGOL 68G|Any - tested with release [http://sourceforge.net/projects/algol68/files/algol68g/algol68g-1.18.0/algol68g-1.18.0-9h.tiny.el5.centos.fc11.i386.rpm/download 1.18.0-9h.tiny]}}

{{works with|ELLA ALGOL 68|Any (with appropriate job cards) - tested with release [http://sourceforge.net/projects/algol68/files/algol68toc/algol68toc-1.8.8d/algol68toc-1.8-8d.fc9.i386.rpm/download 1.8-8d]}}

<lang algol68>MODE RSTWOTHREETWO = BITS;

unsigned clear_to_send : 1;

unsigned ring_indicator : 1;

The ":1" gives the number of allocated bits. For unused bits (e.g. pin 11 in the 25-pin version above) the field name can be omitted.

 

Since as stated before the order of bits can't be assured '''but''' it could be important if we need to interact with hardware, the best way is to define ''bit masks''; of course actual writing/reading to/from an hardware "register" greater than a single byte must be done taking care of endianness.

 

=={{header|D}}==

Implementation uses tango's BitArray structure.

{{libheader|tango}}

 

import tango.core.BitArray;

 

return 0;

 

Output:

Low level hardware control is a typical use of Forth. None of this is standard, however, since hardware I/O mechanisms differ on different systems. Forth does not have a structure mechanism, much less bitfields. These would be represented instead via bitmask constants if doing real serial port control.

 

 

Example usage, assuming I/O primitives '''in''' and '''out''':

 

3fd constant com1-ctrl

decimal

wait-rx

2/

Of course, this is a very simplified view of the full RS-232 protocol. Also, although this represents the order of the pins in a D-9 connector, this would not necessarily be the same as the order of the bits in a control register.

 

=={{header|J}}==

J does not support "structures", nor "fields in a structure". Instead, J supports arrays. And, of course, J could have labels corresponding to the elements of an array representing the state (voltage, current, logical bit value, whatever) of each pin of a 9-pin RS-232 plug:

<lang j>labels=: <;._2]0 :0

[1]

[1]</lang>

 

=={{header|OCaml}}==

'''Library:''' [http://code.google.com/p/ocaml-extlib/ extlib]

class rs232_data = object

val d = BitSet.create 9

method set_ring_indicator b = (if b then BitSet.set else BitSet.unset) d 8

end

 

=={{header|Perl}}==

my $vec = Bit::Vector::Minimal->new(size => 24);

 

 

$vec->set($rs232{'RD Received data'}, 1);

 

=={{header|PicoLisp}}==

The ctypes module allows for the creation of Structures that can map between the structures of C and python datatypes. Within Structures, [http://docs.python.org/library/ctypes.html#bit-fields-in-structures-and-unions bit fields] can be created.

 

 

rs232_9pin = "_0 CD RD TD DTR SG DSR RTS CTS RI".split()

class RS232_25pin(Structure):

 

=={{header|Ruby}}==

=={{header|Tcl}}==

This Tcl implementation represents the fields as bits in an integer. It provides two functions to get from symbolic pin names to the integer, and vice versa.

 

proc rs232_encode args {

catch $test res

if {$res ne $expected} {puts "$test -> $res, expected $expected"}

 

{{omit from|AWK}}

{{omit from|Batch File|No memory management or data structures.}}

{{omit from|E}}

{{omit from|gnuplot}}