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Memory layout of a data structure: Difference between revisions
Memory layout of a data structure (view source)
Revision as of 08:59, 6 February 2009
, 15 years ago→[[Data Representation - Controlling Fields in a Structure#ALGOL 68]]
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end record;
</lang>
=={{header|ALGOL 68}}==
{{works with|ALGOL 68|Standard - no extensions to language used}}
{{works with|ALGOL 68G|Any - tested with release mk15-0.8b.fc9.i386}}
<!-- {{not works with|ELLA ALGOL 68|Any (with appropriate job cards) - tested with release 1.8.8d.fc9.i386}} -->
<!-- n.b. there is a discrepancy between ALGOL 68G and ELLA ALGOL 68,
I am checking the RR to see which is the correct output -->
<pre>
MODE RSTWOTHREETWO = BITS;
INT
lwb rs232 = 1,
carrier detect = 1,
received data = 2,
transmitted data = 3,
data terminal ready = 4,
signal ground = 5,
data set ready = 6,
request to send = 7,
clear to send = 8,
ring indicator = 9,
upb rs232 = 9;
RSTWOTHREETWO rs232 bits := 2r01000000000000000000000000000000; # up to bits width, OR #
rs232 bits := bits pack((FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE));
print(("received data: ",received data ELEM rs232bits))
</pre>
Output:
<pre>
received data: T
</pre>
=={{header|C}}/{{header|C++}}==
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