Memory layout of a data structure: Difference between revisions

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m (<lang>)
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=={{header|Ada}}==
<lang ada>
type Bit is mod 2;
type Rs_232_LayoutBit is recordmod 2;
fortype Rs_232_Layout useis record
Carrier_Detect : Bit;
Received_Data Carrier_Detect : Bit;
Received_Data Transmitted_Data : Bit;
Transmitted_Data Data_Terminal_ready : Bit;
Signal_Ground Data_Terminal_ready : Bit;
Signal_Ground Data_Set_Ready : Bit;
Data_Set_Ready Request_To_Send : Bit;
Clear_To_Send Request_To_Send : Bit;
Clear_To_Send Ring_Indicator : Bit;
Carrier_DetectRing_Indicator : Bit;
end record;
 
for Rs_232_Layout use record
for Rs_232_Layout use record
Carrier_Detect at 0 range 0..0;
Received_Data Carrier_Detect at 0 range 10..10;
Received_Data Transmitted_Data at 0 range 21..21;
Transmitted_Data Data_Terminal_Ready at 0 range 32..32;
Signal_Ground Data_Terminal_Ready at 0 range 43..43;
Signal_Ground Data_Set_Ready at 0 range 54..54;
Data_Set_Ready Request_To_Send at 0 range 65..65;
Clear_To_Send Request_To_Send at 0 range 76..76;
Clear_To_Send Ring_Indicator at 0 range 87..87;
Carrier_DetectRing_Indicator at 0 range 08..08;
end record;
</lang>
 
=={{header|C}}/{{header|C++}}==
Note: The order of the fields is implementation-defined (i.e. the first bit might be the least-significant one or the most-significant one). On GCC and MSVC++, the first bit is the least-significant one.
<lang c>
struct RS232_data
{
unsigned carrier_detect : 1;
unsigned received_data carrier_detect : 1;
unsigned transmitted_datareceived_data : 1;
unsigned data_terminal_readytransmitted_data : 1;
unsigned signal_ground data_terminal_ready : 1;
unsigned data_set_readysignal_ground : 1;
unsigned request_to_senddata_set_ready : 1;
unsigned clear_to_send request_to_send : 1;
unsigned ring_indicatorclear_to_send : 1;
unsigned carrier_detectring_indicator : 1;
};
</lang>
The ":1" gives the number of allocated bits. For unused bits (e.g. pin 11 in the 25-pin version above) the field name can be omitted.
 
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=={{header|OCaml}}==
 
<lang ocaml>open ExtLib
open ExtLib
class rs232_data = object
val d = BitSet.create 9
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method set_ring_indicator b = (if b then BitSet.set else BitSet.unset) d 8
end
;;
;;</ocaml>
</lang>
 
=={{header|Perl}}==
<lang perl>
use Bit::Vector::Minimal qw();
my $vec =use Bit::Vector::Minimal->new qw(size => 24);
usemy $vec = Bit::Vector::Minimal qw->new(size => 24);
 
my %rs232 = reverse (
1 => 'PG Protective ground',
21 => 'TDPG TransmittedProtective dataground',
32 => 'RDTD ReceivedTransmitted data',
43 => 'RTSRD Request toReceived senddata',
54 => 'CTSRTS ClearRequest to send',
65 => 'DSRCTS DataClear setto readysend',
76 => 'SGDSR Data Signalset groundready',
87 => 'CDSG CarrierSignal detectground',
98 => '+CD voltageCarrier (testing)detect',
109 => '-+ voltage (testing)',
1210 => 'SCD - Secondaryvoltage CD(testing)',
1312 => 'SCSSCD Secondary CTSCD',
1413 => 'STDSCS Secondary TDCTS',
1514 => 'TC STD TransmitSecondary clockTD',
1615 => 'SRDTC SecondaryTransmit RDclock',
1716 => 'RC SRD ReceiverSecondary clockRD',
1917 => 'SRSRC SecondaryReceiver RTSclock',
2019 => 'DTR SRS Data terminalSecondary readyRTS',
2120 => 'SQDDTR SignalData qualityterminal detectorready',
2221 => 'RISQD Signal Ringquality indicatordetector',
2322 => 'DRSRI Data rateRing selectindicator',
2423 => 'XTCDRS Data Externalrate clockselect',
24 => 'XTC External clock',
);
 
$vec->set($rs232{'RD Received data'}, 1);
$vec->getset($rs232{'TCRD TransmitReceived clockdata'}, 1);
$vec->setget($rs232{'RDTC ReceivedTransmit dataclock'}, 1);
</perl>
 
=={{header|Python}}==
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code below merely defines a dictionary with the pin names corresponding to entries in the dictionary.
 
<lang python>
<python># Controlling Fields in a Structure in Python
 
rs232 = {
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rs232["RD Received data"] = 1
print rs232["TC Transmit clock"]</python>
</lang>