Memory layout of a data structure: Difference between revisions

Added XPL0 example.
m (syntax highlighting fixup automation)
(Added XPL0 example.)
Line 1,337:
9 RI = OFF
</pre>
 
=={{header|XPL0}}==
<syntaxhighlight lang "XPL0">
Assuming RS-232 pin 1 is connected to bit 0 of an I/O port et cetera, the
bits can be assigned names, such as these:
 
def CD=1<<0, RD=1<<1, TD=1<<2, DTR=1<<3, DSR=1<<4, RTS=1<<5, CTS=1<<6, RI=1<<7;
def RS232=$10;
 
The 'port' command can then be used to access these pin signals by name like this:
port(RS232):= TD ! RTS;
if port(RS232) & RD then ...
 
Note: The 'port' command is implemented in the Intel x86 versions but not
in the Raspberry Pi or Windows (EXPL32) versions.
]</syntaxhighlight>
 
=={{header|Z80 Assembly}}==
{{trans|6502 Assembly}}
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