Memory layout of a data structure: Difference between revisions
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=={{header|ALGOL 68}}== |
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{{works with|ALGOL 68|Standard - no extensions to language used}} |
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{{works with|ALGOL 68G|Any - tested with release mk15-0.8b.fc9.i386}} |
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<!-- {{not works with|ELLA ALGOL 68|Any (with appropriate job cards) - tested with release 1.8.8d.fc9.i386}} --> |
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<!-- n.b. there is a discrepancy between ALGOL 68G and ELLA ALGOL 68, |
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I am checking the RR to see which is the correct output --> |
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<pre> |
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MODE RSTWOTHREETWO = BITS; |
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INT |
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lwb rs232 = 1, |
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carrier detect = 1, |
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received data = 2, |
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transmitted data = 3, |
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data terminal ready = 4, |
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signal ground = 5, |
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data set ready = 6, |
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request to send = 7, |
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clear to send = 8, |
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ring indicator = 9, |
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upb rs232 = 9; |
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RSTWOTHREETWO rs232 bits := 2r01000000000000000000000000000000; # up to bits width, OR # |
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rs232 bits := bits pack((FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE)); |
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print(("received data: ",received data ELEM rs232bits)) |
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</pre> |
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Output: |
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<pre> |
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received data: T |
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</pre> |
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=={{header|C}}/{{header|C++}}== |
=={{header|C}}/{{header|C++}}== |