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Four bit adder: Difference between revisions

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Four bit adder (view source)

Revision as of 17:05, 15 June 2010

183 bytes removed ,  14 years ago
Fixed up description more (wording only)
(→‎{{header|C}}: Try to satisfy both the language expression interest and the task requirements.)
(Fixed up description more (wording only))
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{{task}}
 
The aim of this task is to "''simulate''" a four bits-bit adder "chip". This "chip" can be realized using four [[wp:Adder_(electronics)#Full_adder|1 -bit full adder]]s. Each of these 1 -bit full adders can be realized usingwith two [[wp:Adder_(electronics)#Half_adder|half adder]]s and an ''or'' [[wp:Logic gate|gate]]. And finallyFinally a half adder can be made using a ''xor'' gate and an ''and'' gate. The ''xor'' gate can be realizedmade using two ''not''s, two ''and''s and one ''or''.
 
be'''Not''', '''or''' and '''and''', the only allowed "imitatedgates" byfor the usetask, ofcan be "imitated" by using the [[Bitwise operations|bitwise operators]] of your language. If there is nonot a ''bit type'' in your language, to be sure that the ''not'' does not "invert" all the other bits of the basic type (e.g. a byte) we are not interested in, you can use an extra ''nand'' (''and'' then ''not'') with the constant 1 on one input.▼
'''Not''', '''or''' and '''and''', the only allowed "gates" for the task, can
▲be "imitated" by the use of the bitwise operators of your language. If there is no a ''bit type'' in your language, to be sure that the ''not'' does not "invert" all the other bits of the basic type (e.g. a byte) we are not interested in, you can use an extra ''and'' with the constant 1.
 
Instead of optimizing and reducing the number of used gates used for the final 4-bits-bit adder, build it in the most straightforward way, ''connecting'' the other "constructive blocks", in turn made of "simpler" and "smaller" oneones.
 
Schematics of these "constructive blocks" are here given here.
 
[[File:xor.png|thumb|Xor gate done with ands, ors and nots]]
[[File:halfadder.png|thumb|A half adder]]
[[File:fulladder.png|thumb|A full adder]]
[[File:4bitsadder.png|thumb|A 4-bits-bit adder]]
 
Solutions should try to be as descriptive as possible, making it as easy as possible to identify "connections" between higher-order "blocks". It is not mandatory to replicate the syntax of higher-order blocks in the atomic "gate" blocks, i.e. basic "gate" operations can be performed as usual bitwise operations, or they can be "wrapped" in a ''block'' in order to expose the same syntax of higher-order blocks, at implementers' choice.
 
To test the implementation, show the sum of two four-bitsbit "number"numbers (in binary).
 
=={{header|C}}==
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#define NOT(X) (~(X)&1)
 
/* a shortcut to "implement" a XOR using only NOT, AND and OR gates., as
task requirements constrain */
C has '^' as a bitwise-XOR, but that doesn't follow the task's
building-block approach. */
#define XOR(X,Y) ((NOT(X)&(Y)) | ((X)&NOT(Y)))
 
/* The above define is functionally equivalent to
#define XOR(X,Y) (X^Y) */
 
void halfadder(IN a, IN b, OUT s, OUT c)
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