Four bit adder: Difference between revisions

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|+Schematics of the "constructive blocks"
|+Schematics of the "constructive blocks"
!Xor gate done with ands, ors and nots
!(Xor gate done with ANDs, ORs and NOTs)        
!(A half adder)        
!A half adder
!(A full adder)        
!A full adder
!A 4-bit adder
!(A 4-bit adder)        
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|-
|[[File:xor.png|frameless|Xor gate done with ands, ors and nots]]
|[[File:xor.png|frameless|Xor gate done with ands, ors and nots]]
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|[[File:4bitsadder.png|frameless|A 4-bit adder]]
|[[File:4bitsadder.png|frameless|A 4-bit adder]]
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|}




Solutions should try to be as descriptive as possible, making it as easy as possible to identify "connections" between higher-order "blocks".
Solutions should try to be as descriptive as possible, making it as easy as possible to identify "connections" between higher-order "blocks".

It is not mandatory to replicate the syntax of higher-order blocks in the atomic "gate" blocks, i.e. basic "gate" operations can be performed as usual bitwise operations, or they can be "wrapped" in a ''block'' in order to expose the same syntax of higher-order blocks, at implementers' choice.
It is not mandatory to replicate the syntax of higher-order blocks in the atomic "gate" blocks, i.e. basic "gate" operations can be performed as usual bitwise operations, or they can be "wrapped" in a ''block'' in order to expose the same syntax of higher-order blocks, at implementers' choice.