Flow-control structures: Difference between revisions
Content added Content deleted
Puppydrum64 (talk | contribs) m (→{{header|ARM Assembly}}: clarification) |
Puppydrum64 (talk | contribs) |
||
Line 117: | Line 117: | ||
The return from interrupt instruction pops the flags off the stack, pops the return address off the stack, adds one, and jumps to that location: |
The return from interrupt instruction pops the flags off the stack, pops the return address off the stack, adds one, and jumps to that location: |
||
<lang 6502asm> RTI ;ReTurn from Interrupt</lang> |
<lang 6502asm> RTI ;ReTurn from Interrupt</lang> |
||
=={{header|68000 Assembly}}== |
|||
<code>JMP</code>,<code>JSR</code>,<code>RTS</code>, and branching work almost identical to [[6502 Assembly]]. There are a few exceptions: |
|||
* <code>BCS</code> and <code>BCC</code> are the opposite for the purposes of unsigned comparisons. |
|||
* An additional <code>BSR</code> can be used for nearby subroutines. This is "cheaper" than a <code>JSR</code>. |
|||
* <code>DBRA</code> is used for looping. A register operand is decremented with each loop. The loop terminates when the value in the register underflows from 0 to FFFF. |
|||
=={{header|Ada}}== |
=={{header|Ada}}== |