Conditional structures: Difference between revisions
m
→{{header|MIPS Assembly}}
Puppydrum64 (talk | contribs) |
Puppydrum64 (talk | contribs) |
||
Line 4,302:
nop ;branch delay slot</lang>
The nice thing about this is, unlike most CISC architectures, you can make some important calculation that you'll use as a condition to branch, and before actually branching, do some other unrelated stuff without the CPU forgetting the correct way to branch. The following (rather contrived) example displays this idea in action:
If you're wondering how the delay slot impacts the comparison, it doesn't. The delay slot instruction executes after the comparison has been made and CPU has decided whether to branch. (See [[MIPS Assembly]] for more info on what delay slots are.) As a result, code like this can introduce subtle off-by-one errors:▼
<lang mips>addu $t0,$t1 ;I'm going to branch based off this addition, but there's other things I want to do first.
lw $t3,($t4)
nop ;load delay slot
BEQ $t0,$t1,Label
nop ;branch delay slot</lang>
▲If you're wondering how
<lang mips>BNEZ $t0,loop ;branch if $t0 is nonzero.
| |||