Conditional structures: Difference between revisions
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→{{header|6502 Assembly}}: corrected typo
(Conditional structures en Verilog) |
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ADC #1
STA OtherVariable ; ...to here.</lang>
Because you don't have to perform a comparison to set the flags, you can perform very fast checks in
<lang 6502asm> LDX #100
Loop: ...do something
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