Category:MIPS Assembly: Difference between revisions
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* Effect: Adds <tt>0x1234</tt> to <code>$t0</code> and stores the result in <code>$t0</code>.
* Notes: This will ''not'' cause an overflow exception if the register operand is less than <tt>0x7FFFFFFF</tt> and the result is greater. The constant value is sign-extended if it is less than 32-bit. If the destination and the register operand are the same register, you can omit one of them like so: <code>addiu $t0,0x1234</code>
The related pseudo-instruction <code>subiu</code> is an alternative if you wish to express the idea that you're subtracting an unsigned number. It gets converted to <code>addiu</code> and the constant operand is replaced with its two's complement. In other words, <code>subiu $t0,1</code> is the same as <code>addiu $t0,-1</code>.
===BEQ===
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