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Category:MIPS Assembly: Difference between revisions

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Category:MIPS Assembly (view source)

Revision as of 18:34, 9 July 2022

527 bytes removed ,  1 year ago
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* Effect: Adds <tt>0x1234</tt> to <code>$t0</code> and stores the result in <code>$t0</code>.
* Notes: This will ''not'' cause an overflow exception if the register operand is less than <tt>0x7FFFFFFF</tt> and the result is greater. The constant value is sign-extended if it is less than 32-bit. If the destination and the register operand are the same register, you can omit one of them like so: <code>addiu $t0,0x1234</code>
 
===BNE===
* Stands for: '''B'''ranch if '''N'''ot '''E'''qual
* Usage: <code>bne $operand1,$operand2,label</code>
* Example: <code>bne $t0,$t1,T0NotEqualtoT1</code>
* Effect: Compares the register operands, and if they're not equal, adds (signed) the specified offset to <code>PC</code>. (usually a labeled line of code that the assembler translates to a calculated offset.) Otherwise, execution falls through to the ''instruction after the instruction after'' the <code>bne</code>. This is not a typo, that's how MIPS works.
 
===BEQ===
Puppydrum64
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