Category:MIPS Assembly: Difference between revisions

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* Effect: Compares the register operands, and if they're not equal, adds (signed) the specified offset to <code>PC</code>. (usually a labeled line of code that the assembler translates to a calculated offset.) Otherwise, execution falls through to the ''instruction after the instruction after'' the <code>bne</code>. This is not a typo, that's how MIPS works.
* Effect: Compares the register operands, and if they're not equal, adds (signed) the specified offset to <code>PC</code>. (usually a labeled line of code that the assembler translates to a calculated offset.) Otherwise, execution falls through to the ''instruction after the instruction after'' the <code>bne</code>. This is not a typo, that's how MIPS works.


===BNE===
===BNEZ===
* Stands for: '''B'''ranch if '''N'''ot '''E'''qual to '''Z'''ero
* Stands for: '''B'''ranch if '''N'''ot '''E'''qual to '''Z'''ero
* Usage: <code>bne $operand1label</code>
* Usage: <code>bnez $operand1,label</code>
* Example: <code>bne $t0,$t1,T0_Nonzero</code>
* Example: <code>bnez $t0,T0_Nonzero</code>
* Effect: Compares the register operands, and if they're not equal, adds (signed) the specified offset to <code>PC</code>. (usually a labeled line of code that the assembler translates to a calculated offset.) Otherwise, execution falls through to the ''instruction after the instruction after'' the <code>bnez</code>. This is not a typo, that's how MIPS works.
* Effect: If the register operand doesn't contain zero, adds (signed) the specified offset to <code>PC</code>. (usually a labeled line of code that the assembler translates to a calculated offset.) Otherwise, execution falls through to the ''instruction after the instruction after'' the <code>bnez</code>. This is not a typo, that's how MIPS works.


==See Also==
==See Also==
Retrieved from "https://rosettacode.org/wiki/Category:MIPS_Assembly"