Category:MIPS Assembly: Difference between revisions

==Instruction Set==

===ADDU===

* Stands for: '''A'''dd '''U'''nsigned

* Usage: <code>addu $dest,$operand1,$operand2</code>

* Example: <code>addu $t2,$t1,$t0</code>

* Effect: Adds the contents of <code>$t1</code> to <code>$t0</code> and stores the result in <code>$t2</code>.

* Notes: This will ''not'' cause an overflow exception if the operands were each less than <tt>0x7FFFFFFF</tt> and the result is greater than that.

===ADDIU===

* Stands for: '''A'''dd '''I'''mmediate '''U'''nsigned

* Usage: <code>addiu $dest,$operand1,constant</code>

* Example: <code>addiu $t0,$t0,0x1234</code>

* Effect: Adds <tt>0x1234</tt> to <code>$t0</code> and stores the result in <code>$t0</code>.

* Notes: This will ''not'' cause an overflow exception if the register operand is less than <tt>0x7FFFFFFF</tt> and the result is greater. The constant value is sign-extended if it is less than 32-bit. If the destination and the register operand are the same register, you can omit one of them like so: <code>addiu $t0,0x1234</code>

===BNE===

* Stands for: '''B'''ranch if '''N'''ot '''E'''qual

* Usage: <code>bne $operand1,$operand2,label</code>

* Example: <code>bne $t0,$t1,T0NotEqualtoT1</code>

* Effect: Compares the register operands, and if they're not equal, adds (signed) the specified offset to <code>PC</code>. (usually a labeled line of code that the assembler translates to a calculated offset.) Otherwise, execution falls through to the ''instruction after the instruction after'' the <code>bne</code>. This is not a typo, that's how MIPS works.

===BEQ===

* Stands for: '''B'''ranch if '''Eq'''ual

* Usage: <code>beq $operand1,$operand2,label</code>

* Example: <code>beq $t0,$t1,T0NotEqualtoT1</code>

* Effect: Compares the register operands, and if they're equal, adds (signed) the specified offset to <code>PC</code>. (usually a labeled line of code that the assembler translates to a calculated offset.) Otherwise, execution falls through to the ''instruction after the instruction after'' the <code>beq</code>. This is not a typo, that's how MIPS works.

===BEQZ===

* Stands for: '''B'''ranch if '''Eq'''ual to '''Z'''ero

* Usage: <code>beqz $operand1,label</code>

* Example: <code>beqz $t0,T0_is_Zero</code>

* Effect: If the register operand contains 0, adds (signed) the specified offset to <code>PC</code>. (usually a labeled line of code that the assembler translates to a calculated offset.) Otherwise, execution falls through to the ''instruction after the instruction after'' the <code>beqz</code>. This is not a typo, that's how MIPS works.

===BNE===

* Stands for: '''B'''ranch if '''N'''ot '''E'''qual

* Usage: <code>bne $operand1,$operand2,label</code>

* Example: <code>bne $t0,$t1,T0_Not_Equal_to_T1</code>

* Effect: Compares the register operands, and if they're not equal, adds (signed) the specified offset to <code>PC</code>. (usually a labeled line of code that the assembler translates to a calculated offset.) Otherwise, execution falls through to the ''instruction after the instruction after'' the <code>bne</code>. This is not a typo, that's how MIPS works.

===BNE===

* Stands for: '''B'''ranch if '''N'''ot '''E'''qual to '''Z'''ero

* Usage: <code>bne $operand1label</code>

* Example: <code>bne $t0,$t1,T0_Nonzero</code>

* Effect: Compares the register operands, and if they're not equal, adds (signed) the specified offset to <code>PC</code>. (usually a labeled line of code that the assembler translates to a calculated offset.) Otherwise, execution falls through to the ''instruction after the instruction after'' the <code>bnez</code>. This is not a typo, that's how MIPS works.

[https://en.m.wikibooks.org/wiki/N64_Programming/CPU_overview Overview of N64 Architecture]