Arithmetic/Integer: Difference between revisions

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(Arithmetic/Integer en Verilog)
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RTS ;return from subroutine</lang>
The 6502 has no opcodes for multiplication, division, or modulus; the routines for multiplication, division, and modulus given above can be heavily optimized at the expense of some clarity.
=={{header|68000 Assembly}}==
<lang 68000devpac>ADD.L D0,D1 ; add two numbers
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SUB.L D1,D0 ; subtract D1 from D0
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MULU D0,D1 ; multiply two unsigned numbers. Use MULS for signed numbers
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DIVU D1,D0 ; Divide D0 by D1. Use DIVS for signed numbers. Upper two bytes of D0 are the remainder, lower two are the integer quotient.
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MODULUS:
DIVU D1,D0
SWAP D0 ;swap the order of the 16-bit halves of D0.
RTS</lang>
 
 
=={{header|AArch64 Assembly}}==
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