Category:MIPS Assembly: Difference between revisions

This is only a concern on the first generation of MIPS hardware. When loading a value from memory, the register that is loaded with the value won't actually have it by the time the next instruction has already been executed. The way around this is to place a <code>NOP</code> after the load, or alternatively, an instruction that doesn't depend on the new value of that register.

 

addiu t0,1 ;when this instruction is executed, t0 hasn't updated yet with its value from the previous instruction.</lang>